Development of low-temperature low-noise low-background HPGe CMOS front-end electronics

10 May 2024, 15:20
20m
二楼第六会议厅

二楼第六会议厅

01 - 分会报告 15 - 电子学 15 - 电子学

Speaker

Xiangke Ye

Description

A cryogenic low-noise CMOS preamplifier has been successfully developed for HPGe detectors for the CDEX dark matter search experiments. The noise of the ASIC was optimized for 1pF input capacitance. The prototype chip was implemented in GF 180 nm CMOS process and was fully evaluated at low temperature. The power-on-reset module of the 2023 version of the preamplifier was tested. The rise time of the preamplifier was 48 ns when directly driving 1 meter long cable. The ENC was obtained to be 3.0 electrons for 0 pF input capacitances at 12 µs shaping time at 77 K.

Primary authors

Li He Xiangke Ye Zhi Deng (Tsinghua University)

Presentation materials